Keyboard Builders' Digest / Projects
Nyan Keys
An FPGA based mechanical keyboard engineered for low latency and open sourced by rekcats – Nyan Keys.
Published December 15, 2023
This pretty standard-looking keyboard with a 60% layout, called Nyan Keys, was designed by rekcats/russeree with optimizing for low end to end latency in mind. To be more specific: its purpose was to engineer the lowest possible latency mechanical keyboard that would accept any Cherry compatible switches.
The FPGA based mechanical keyboard was designed and built with parallel per key inputs and debouncing, and an STM32F723 MCU to enable USB 2.0 High Speed 480Mb/s communication to the host computer at 8000hz to achieve the lowest latency possible.
To be honest, I have no idea if this makes any difference for the average keyboard user, so let's pass the mic to the author:
So one of the questions that keeps coming up is what is the end to end latency of this board. Well being up front I don't have the same level of tech that Rtings has. What I did decide to do was use my Saleae Logic Analyzer to capture the state of the stop capture key and the time until the capture stops once I press that key. The results still blow even the fastest keyboards out of the water at ~300-500us time between the logic level of the switch changing and the actual capture stop. These results include all delays including OS, USB Stack, and application.
FPGA & debounce mechanism
The most novel element to Nyan Keys is the use of an FPGA to handle the debouncing logic and serialization of the parallel keys interface. Using an FPGA had the advantage of being able to wire each switch to it's own IO pin, which could be pulled high with the internal pull-up resistors on the Lattice Ice20HX4K IO block. According to the author, this design greatly increased the routing complexity but at the same time removed any need for additional components such as diodes with each switch.
Using and FPGA allowed for the ability to give each key (switch) it's own core, which consists of an 8 bit timer. The timer is always counting up to the value of 255, once the counter reaches the comparison value the key can change its state and the timer will reset to 0. While the counter is any value that is not 255 the switch state can not be changed. This is the debounce mechanism.
There are 2 primary advantages of the above method for debouncing. The first is that the key press is able to be instantly registered for the press and release as long as the debounce lockout counter has passed. Second it's very area efficient using ~25-30% of an Ice40HX4K for 61 total keys. More details here.
Resources
- https://github.com/russeree/nyan-keys-hardware
- https://hackaday.io/project/193920-nyan-keys-fpga-based-mechanical-keyboard
Published on Fri 15th Dec 2023. Featured in KBD #147 (source).
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